1. Field of the Invention
This invention relates to a direct conversion receiver for receiving a digital modulation radio wave signal.
2. Description of the Prior Art
A direct conversion receiver for receiving a radio wave signal modulated by a digital modulation method, such as a frequency shift keying (FSK) is known. Such a prior art direct conversion receiver is disclosed in Japanese patent application provisional publication No. 55-14701. FIG. 17 is a block diagram of a prior art direct conversion receiver. A received FSK signal 101 is supplied to mixers 102 and 103. A local oscillator 104 generates a local oscillation signal having a frequency which is substantially the same as a carrier frequency of the FSK signal. The local oscillation signal is supplied to a 90.degree. phase shifter distributor 105. The 90.degree. phase shifter distributor 105 supplies the local oscillation signal to the mixer 102 and a 90.degree. phase shifted oscillation signal to the mixer 103, wherein it is assumed that the local oscillation signal supplied to the mixer 102 leads the 90.degree. phase shifted local oscillation signal supplied to the mixer 103 by a phase angle 90.degree.. The mixer 102 mixes the received FSK signal 101 with the local oscillation signal and the mixer 103 mixes the received FSK signal 101 with the 90.degree. phase shifted local oscillation signal. The outputs of the mixers 102 and 103 are supplied to amplitude limiting amplifiers 110 and 111 through low pass filters 108 and 107 (analog I signal 108 and analog Q signal 109) respectively. The amplitude limiting amplifier 110 amplifies the output of the low pass filter 106 with amplitude limitation to supply a digital in-phase base band signal 112 (digital I signal). The amplitude limiting amplifier 111 amplifies the output of the low pass filter 107 with amplitude limitation to supply a digital quadrature base band signal 113 (digital Q signal). The digital I and Q signals have a quadrature phase relation which is inverted by the frequency shift of the FSK signal.
In this case, assuming that when the digital Q signal leads the digital I signal, data in the FSK signal shows logic H level and when the digital Q signal lags the digital I signal, data in the FSK signal shows logic L level. The I signal is supplied to a clock input of a D flip flop circuit 901 and the Q signal is supplied to a D input of the D flip flop circuit 901. An output of the D flip flop circuit 901 is supplied to a low pass filter 902 to obtain a final demodulated output of the FSK signal.
However, there is a problem that in that prior art direct conversion receiver, because a judgement of data is made only at a rising edge of the digital I signal, a change of data cannot be detected until the next rising edge of the digital I signal occurs. Thus, there is a delay in the Judgement of data. Moreover, if there is an error in the judgement of data due to a variation in the digital I signal due to a noise or the like, the judgement of data remains erroneous until the next rising edge of the digital I signal occurs and the possibility that the low pass filter outputs an erroneous final output result. This problem becomes more severe with a decrease in the modulation index.